A parameterizable activation function generator for FPGA-based neural network applications

Abstract

Neural network applications on FPGAs at times require arithmetic operators that are either not available in the manufacturer’s core library, or are complex operators made up of several elementary functions, requiring more resources than if they were built as single operators. In this work, we built an open-source, parameterized floating-point core generator named NnCore, for operators used as activation functions, and their derivatives. We propose a binary search algorithm to search for minimax-polynomial segments, with adjusting steps for ensuring monotonicity between different segments.

Publication
2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)
Ho-Cheung Ng
Ho-Cheung Ng
M.Phil, PhD Candidate (ICL)
Maolin Wang
Maolin Wang
PhD Candidate
Hayden Kwok-Hay So
Hayden Kwok-Hay So
Associate Professor