Cheng Liu graduated from The University of Hong Kong under the supervision of Prof. Hayden So and Prof. Ngai Wong in 2016. He worked on the FPGA overlay project and proposed a soft CGRA overlay based loop acceleration design framework named QuickDough. This framework can be used to compile high-level loop kernels to FPGA bitstreams in seconds and to achieve significant performance speedup over embedded arm processors at the same time. He is now an assoicate professor in Institute of Computing Technology, Chinese Academy of Sciences. (https://liu-cheng.github.io/)