Computer Architecture and System Research (CASR) The University of Hong Kong

Hayden Kwok-Hay So

Hayden Kwok-Hay So

Associate Professor

The University of Hong Kong

Principal Investigator

Dr. Hayden Kwok-Hay So is an Associate Professor at the Department of Electrical and Electronic Engineering, The University of Hong Kong. His main research interest is in the area of reconfigurable computing using Field Programmable Gate Array (FPGA) and Graphics Processing Unit (GPU). His current work focuses on applying reconfigurable computing techniques in data-centre settings to improve their power-efficiencies. An FPGA is an integrated circuit that allows its functionality to be changed or reconfigured during its lifetime. This enables the user to create specific computing features required for target applications. With GPU computing, the graphic display card of a computer originally designed for processing on-screen graphics is used for general-purpose computing instead, this can be very power efficient as it delivers considerable computation without much power increment. A data-centre is a large construction housing thousands and thousands of computers, which performs computations that support modern IT infrastructures. Google and Facebook are examples of companies that operate large-scale data-centres.

Before joining HKU, Dr. So obtained his B.S. in Electrical Engineering and Computer Sciences (1998), his M.S. (2000) and his PhD (2007) at the University of California, Berkeley. At Berkeley, he worked with Prof. Bob Brodersen at the Berkeley Wireless Research Center.

Meet Our Team

Principal Investigators

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Hayden Kwok-Hay So

Associate Professor

Grad Students

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Maolin Wang

PhD Candidate

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Runbin Shi

PhD Candidate

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Junjie Liu

M.Phil Candidate

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Yuhao Ding

PhD Candidate

Alumni

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Manish Kumar Jaiswal

PhD, Research Scientist

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Ho-Cheung Ng

M.Phil, PhD Candidate (ICL)

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B. Sharat Chandra Varma

PhD, PostDoc Research Fellow

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Cheng Liu

PhD

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Mingo Choi

MPhil

Projects

FPGA Overlay

FPGAs demonstrate valuable potential for customized acceleration. However, the design productivity of developing FPGA accelerators remains much lower compared to the use of a typical software development flow. In this project, we investigate the FPGA overlay, an effective FPGA design abstraction for general computation dataflow and domain-specific scenarios.

AI Hardware and Applications

The main issue that hinders broad adoption of deep learning techniques in realworld applications is the massive computing workload, which prevents realtime implementation on low-power embedded platforms. In this project, we investigate the design of parallel hardware accelerators for featured DL applications.

Graph Processing on FPGA

In this project, we present GraVF-M, a framework designed to ease the implementation of FPGA-based graph processing accelerators for multi-FPGA platforms with distributed memory.

Imaging Hardware and Applications

A fundamental technical challenge for ultra-fast cell microscopy is the trade-off between imaging throughput and resolution. In this project, we investigate the imaging and enhancement schemes and the dedicated FPGA hardware for the cutting edge cell microscopy.

Advanced Arithmetic Circuits

In this project, we continually investigate more efficient hardware design for arithmetic units. We study the standard IEEE floating-point arithmetic and pay further attention to the cutting edge emerging floating-point number system, such as Posit.

Contact

  • hso AT eee dot hku dot hk
  • CB101, Main Campus, The University of Hong Kong, HK